The Complete Microprocessor
Task 4-1: Build and Test the Memory-Address-Generation Circuit
Include a picture of your Digital circuit here:
Comment on the single biggest issue you were facing when designing the circuit.
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Task 4-2: Build and Test the Controller Circuit
Include a picture of your two_bit_mux circuit here:
Comment on the single biggest issue you were facing when designing the circuit.
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Include a picture of your two_bit_reg circuit here:
Comment on the single biggest issue you were facing when designing the circuit.
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Include a picture of your controller circuit here:
Comment on the single biggest issue you were facing when designing the circuit.
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Task 4-3: Build the Complete Microprocessor Circuit
Include a picture of your Digital circuit here (make sure to show final values as shown in figure 17):comment on the single biggest issue you were facing when designing the circuit.
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Task 4-4: Simulate the Design in Verilog
Include a picture of your waveforms here:
Comment on the single biggest issue you were facing when simulating the processor.
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Task 4-5: Add the AND, ZERO, SUB, and STORE ACC Instructions
Use Table 1 and Table 2 to enter your values into the microinstruction definition table for each of the four instructions asked for in the laboratory manual. Be sure to label the name of each and every instruction.
| Table 1 | |||||||||
| Instruction | AND | ZERO | |||||||
| Opcode | 3 | 4 | |||||||
| step | 00 | 01 | 02 | 03 | 00 | 01 | 02 | 03 | |
| Description | Bit # | ||||||||
| next_step[1:0] | 13:12 | ||||||||
| unused | 11:10 | ||||||||
| use_pc | 9 | ||||||||
| load_mar | 8 | ||||||||
| arith | 7 | ||||||||
| invert | 6 | ||||||||
| pass | 5 | ||||||||
| load_acc | 4 | ||||||||
| acc_to_db | 3 | ||||||||
| read | 2 | ||||||||
| write | 1 | ||||||||
| load_ir | 0 | ||||||||
| Table 2 | |||||||||
| Instruction | SUB | STORE ACC | |||||||
| Opcode | 5 | 6 | |||||||
| step | 00 | 01 | 02 | 03 | 00 | 01 | 02 | 03 | |
| Description | Bit # | ||||||||
| next_step[1:0] | 13:12 | ||||||||
| unused | 11:10 | ||||||||
| use_pc | 9 | ||||||||
| load_mar | 8 | ||||||||
| arith | 7 | ||||||||
| invert | 6 | ||||||||
| pass | 5 | ||||||||
| load_acc | 4 | ||||||||
| acc_to_db | 3 | ||||||||
| read | 2 | ||||||||
| write | 1 | ||||||||
| load_ir | 0 | ||||||||
Test your instructions by writing and executing programs. Record at least four programs and the output of each program in tables like that of Table 3.
| Table 3 | ||
| Program #0 ( Example: ADD = 3+5) | ||
| Address | Value | Operation (In English) |
| 0 | 0 | The ‘Load ACC’ Opcode |
| 1 | 3 | The number ‘3’ to be loaded into the Accumulator |
| 2 | 1 | The ‘Add to ACC’ Opcode |
| 3 | 5 | The number ‘5’ to be added to the Accumulator |
| 4 | 2 | The ‘Stop’ Opcode |
| What was the final output of your program? ___8__ | ||
| Was the program successful? YES_ | ||
| If not what error(s) did you find in your circuit? | ||
| Program ( ) | ||
| Address | Value | Operation (In English) |
| What was the final output of your program? _____ | ||
| Was the program successful? Yes or No_ | ||
| If not what error(s) did you find in your circuit? | ||
Include a picture of your AND waveforms here:
Include a picture of your ZERO waveforms here:
Include a picture of your SUB waveforms here:
Include a picture of your STORE ACC waveforms here:
Did the circuit behave as expected? If no, what was wrong?
Comment on the single biggest issue you were facing when simulating the circuit.
Task 4-6: Invent Your Own Instruction (Extra Credit)
| Table 4 | |||||
| Instruction | |||||
| Opcode | 7 | ||||
| step | 00 | 01 | 02 | 03 | |
| Description | Bit # | ||||
| next_step[1:0] | 13:12 | ||||
| unused | 11:10 | ||||
| use_pc | 9 | ||||
| load_mar | 8 | ||||
| arith | 7 | ||||
| invert | 6 | ||||
| pass | 5 | ||||
| load_acc | 4 | ||||
| acc_to_db | 3 | ||||
| read | 2 | ||||
| write | 1 | ||||
| load_ir | 0 | ||||
Include your Verilog program here:
Include a picture of your waveforms here:
Include a picture of your ROM contents here:
Task 4-7: Create a video and submit your report
Record a short video showing your schematics in Digital and your waveforms in GTKWave. Be sure to show yourself in the video and show your screen. Explain how your circuit works – you need to convince the grader you did the lab and understand it. If your circuit is not working as expected, explain in the video how it is not working and why you think it is not working.